microEnable 5 marathon deepVCL

CameraLink Frame Grabber

  • Enables real-time image processing for Deep Learning
  • Compliant to VisualApplets CNN operator
  • Onboard image preprocessing functions
  • Industrial multi-device, multi-camera support
  • DMA 1800 / up to 1800 MB/s PCIe Data bandwidth (PCIe x4 Gen2)
  • Supports opto-decoupled signals via front I/O
  • Broad support of Third-party software interfaces
  • Versatile application and industry usage
  • Custom FPGA programming with VisualApplets supporting Xilinx Kintex FPGAs
  • PoCL SafePower.

$ 923.00

SPECIFICATIONS

Model microEnable 5 marathon deepVCL
Part Number 108094
Product Family V-Line
Processor Vision Processor
Onboard Memory 2 GByte DDR3-RAM
Camera Interface Cameralink 2.0
Camera Connectors 2 x SDR26 (miniCL)
Configurations CL-full, CL-medium, CL-dual base, CL-base, CL-deca (80bit)
Power Output PoCL SafePower: 4W @ 12V per Cable
Camera Format Support Area Scan or Line Scan
Camera/Sensor Support Bayer CFA, Monochrome.greyscale, RGB
Bit Depth 8-16 bit Greyscale. 24-48 bit Color
Data Bandwidth 850 MegaBytes/sec
Test Environment Built-In Camera Simulator
PC Bus Interface PCI Express x4 (Gen 2) DMA 1800
PC Bus Interface Performance up to 1800 MBytes/s (sustainable)
Onboard GPIO interface
Shaft encoder input, programmable re-scaler, multiple-camera synchronization, 4 opto-coupled inputs (4,5V – 28V), optional 2 opto-coupled differential inputs (RS422), 4 opto-coupled outputs (4,5V – 28V)
Onboard Front GPIO Interface
2 TTL outputs, up to 20 MHz frequency, Shaft encoder input, programmable re-scaler: multiple-camera synchronization, RS485 interface (PLC connection) scheduled, 2 opto-coupled differential inputs (RS422) and 1 opto-coupled differential / single ended input, optional (conf.): 4 opto-coupled Inputs (4,5V – 28V) with up to 1 MHz frequency
GPIO Synchronization and Control Configurable Trigger System supporting several trigger modes (grabber controlled, external trigger, gated, software trigger) and shaft encoder functionality with backward compensation, Multi-Camera-Synchronization
GPIO Interface Summary onboard: 8in/8out (max.), TTL or opto-coupled, Front GPIO: up to 3 differential signals in, up to 4 single-ended signals in (depends on configuration), 2 TTL outputs
Basic Processing Features Tap Sorting (Sensor Readout Correction), Offset/Gain/Gamma correction, Invert, ROI, Image Selector, LUT

MECHANICAL and ENVIRONMENTAL

Dimensions PCIe Standard Height Half-Length card: 167.64 mm (L) x 111.15 mm (H) 
Mass 165 g
Power Consumption 1.4 Amp @ 12 VDC
Operating Temperature 50° (0 LFM*), 60° (100 LFM*) FPGA operating temperature: 0°C to 85°C, *LFM = Linear Feet per Minute, unit for measuring airflow velocity
Storage Temperature 50°C to 80°C
Relative Humidity (operating, storage) 5%-90% non-condensing (operating), 0%-95% (storage)
Environmental Compliance WEEE, RoHS, REACH

SOFTWARE SUPPORT

Software Drivers Windows 10 / 8 / 7 (32-Bit), Windows 10 / 8 / 7 (64-Bit), Linux 32-Bit, Linux 64-Bit
Software Tools microDisplay (Acquisition control and viewer), GenICam Explorer (Camera configuration tool), Documentation, microDiagnostics (Service tool), SDK, Device Drivers
Software API Silicon Software SDK, .net interface
FPGA Programming not programmable
BV-Software Compatibility Common Vision Blox, Halcon

 

DOCUMENTATION

Basler Product Documentation – ONLINE VERSION
(Baslerweb.com link opens in separate TAB)

DOWNLOADS

Basler Product Manual Offline DOWNLOAD
Basler Computer Vision Portfolio Brochure

ACCESSORIES

TRIGGER BOARDS – for Synchronization

TTL Trigger – Trigger board
Trigger Board for Standard TTL

Opto-coupled Trigger 5 – Trigger board
Trigger Board for Opto-Coupled Signals

 

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